Signal tuner circuits include filters that remove one or more frequencies of a signal. Engineers often desire to know the center frequency of a given filter in a tuner circuit in order to determine if the filter itself is defective, should be adjusted, or if other components should be adjusted. This is especially true in semiconductor chip-based tuners, wherein semiconductor manufacturing variance may cause filters to have frequency characteristics that differ somewhat from their desired or predicted values.
One current technique to measure center frequencies of filters is to use circuitry that measures the phase shift that a signal experiences as it passes through a particular filter under test. There is a relationship between phase shift and center frequency, such that the phase shift information can be used to calculate an approximate filter center frequency. However, this is undesirable for multi-stage filters or circuits employing multiple filters. Since each stage of a multi-stage filter has its own frequency characteristics, a signal phase shift caused by the entire filter is not necessarily indicative of the phase shift that is caused by any one stage of the filter, especially when the effects of one filter stage tend to dominate the results, as is the case when one stage has a “zero” in its transfer function. Thus, it can be difficult to determine the center frequency of a given filter stage. Moreover, it is often impractical to measure the phase shift at each stage of a multi-stage filter because phase shift testing circuitry often tends to change the behavior of the filter being tested, thereby introducing error, and employing testing circuitry at each stage may introduce an unacceptable amount of error in the measurements. Further, since phase shift is closely related to time delay, phase shift measurements are often very sensitive to line length and parasitic capacitance effects, such that, even under good circumstances, such measurements can be error-prone.
Another current technique is to employ off-chip testing equipment to inject test signals into the tuner and capture the output of the tuner. The test equipment then calculates filter behavior based upon the tuner output. The disadvantages of this technique include the high cost of testing and the fact that such off-the-assembly-line-testing does not account for frequency response changes over the life of the tuner making subsequent and/or real-time adjustment impractical.
Yet another technique is to create an on-chip replica of a tuner filter or part thereof, subject it to testing, and calibrate the actual tuner filter based upon the results of the testing. However, this is expensive in terms of die space. No prior art solution provides accurate center frequency measurement of on-chip tuner filters at a lower cost and throughout the life of the tuner, especially for those tuners that include multiple filter stages.